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Patent
Publication NumberUS 10730073Filing StatusIssued PatentAvailabilityUnknownFiling Date2017-08-30Publication Date2020-08-04
A circuit for an ultrasonic channel has a first and a second terminal between which extend a resistive and diode signal paths including a pair of diodes with opposing polarities, for example in anti-parallel. Switching circuitry is coupled with the resistive and diode signal paths and is switchable between first and second states. In the first state, the first and the second terminals are coupled with one another via the resistive signal path. In the second state, the first and the second ter…
Patent
Publication NumberUS 10734476Filing StatusIssued PatentAvailabilityUnknownFiling Date2018-11-09Publication Date2020-08-04
An integrated electronic device forming a power device and including: a semiconductor body; a first conductive region and a second conductive region, which extend over the semiconductor body, the second conductive region surrounding the first conductive region at a distance; and an edge termination structure, which is arranged between the first and second conductive regions and includes a dielectric region, which delimits an active area of the power device, and a semiconductive structure, whi…
Patent
Publication NumberUS 10731984Filing StatusIssued PatentAvailabilityUnknownFiling Date2019-11-15Publication Date2020-08-04
A sensor chip includes registers storing and outputting configuration data, an extraction circuit receiving digital data and extracting features of the digital data in accordance with the configuration data, and a classification circuit applying a decision tree to the extracted features to generate a context of an electronic device into which the sensor chip is incorporated relative to its surroundings, the decision tree operating according to the configuration data. The classification unit o…
Patent
Publication NumberUS 10734504Filing StatusIssued PatentAvailabilityUnknownFiling Date2018-06-27Publication Date2020-08-04
A method of forming a finFET transistor device includes forming a crystalline, compressive strained silicon germanium (cSiGe) layer over a substrate; masking a first region of the cSiGe layer so as to expose a second region of the cSiGe layer; subjecting the exposed second region of the cSiGe layer to an implant process so as to amorphize a bottom portion thereof and transform the cSiGe layer in the second region to a relaxed SiGe (rSiGe) layer; performing an annealing process so as to recrys…
Patent
Publication NumberUS 10734954Filing StatusIssued PatentAvailabilityUnknownFiling Date2017-08-30Publication Date2020-08-04
An operational amplifier including an input stage coupled to an input terminal, an output stage coupled to an output terminal, and a gain node between the input stage and the output stage. A bias current source is couplable to the input stage to supply a bias current thereto and a current mirror circuit mirrors the bias current toward the gain node and the output stage. A switch circuit includes a switch activatable to bring the gain node to a pre-bias voltage and a switch coupled to the outp…
Patent
Publication NumberUS 20200244155Filing StatusPatent ApplicationAvailabilityUnknownFiling Date2020-04-17Publication Date2020-07-30
An electronic converter includes first and second inputs, first and second outputs, and a switching cell configured to supply current. The switching cell includes a half-bridge including first and second switches connected in series between the two inputs. The half-bridge includes a intermediate point between the first and second switch, a first inductor directly connected to the first output, a second inductor connected to the intermediate point, a first capacitor connected in series with th…
Patent
Publication NumberUS 20200243496Filing StatusPatent ApplicationAvailabilityUnknownFiling Date2020-01-27Publication Date2020-07-30
A semiconductor die includes a structural body that has a power region and a peripheral region surrounding the power region. At least one power device is positioned in the power region. Trench-insulation means extend in the structural body starting from the front side towards the back side along a first direction, adapted to hinder conduction of heat from the power region towards the peripheral region along a second direction orthogonal to the first direction. The trench-insulation means have…
Patent
Publication NumberUS 20200243512Filing StatusPatent ApplicationAvailabilityUnknownFiling Date2020-01-08Publication Date2020-07-30
A circuit includes a logic circuit and a driver. The driver includes a first NMOS having a gate coupled to the logic circuit and source coupled to a reference voltage, a PAD coupled to a drain of the first NMOS, and a driver protection circuit. The driver protection circuit includes a second NMOS having a drain coupled to the PAD through a capacitor, source coupled to the reference voltage, and gate coupled to a supply voltage, and a resistor coupled between the drain of the second NMOS and t…
Patent
Publication NumberUS 20200244168Filing StatusPatent ApplicationAvailabilityUnknownFiling Date2020-04-15Publication Date2020-07-30
A sensor comprises a first transistor comprising a first control terminal, a second transistor that is a scaled version of and connected to the first transistor and comprising a second control terminal, an operational amplifier connected to both the first and second transistors and configured to generate an intermediate signal at an output terminal, a variable current source, a current mirror, a measurement circuit, and a chopper circuit. The first and second control terminals are configured …
Patent
Publication NumberUS 20200243518Filing StatusPatent ApplicationAvailabilityUnknownFiling Date2020-01-29Publication Date2020-07-30
The power device is formed by a D-mode HEMT and by a MOSFET in cascade to each other and integrated in a chip having a base body and a heterostructure layer on the base body. The D-mode HEMT includes a channel area formed in the heterostructure layer; the MOSFET includes a first and a second conduction region formed in the base body, and an insulated-gate region formed in the heterostructure layer, laterally and electrically insulated from the D-mode HEMT. A first metal region extends through…
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